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A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS.

Xiaoteng ZhaoYong ChenPui-In MakRui Paulo Martins
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2021)
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