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Throttling Capacity Sharing Using Life Time and Reuse Time Prediction in Private L2 Caches of Chip Multiprocessors.
Young-Sik Eom
Jong Wook Kwak
Seong Tae Jhang
Chu Shik Jhon
Published in:
IEICE Trans. Inf. Syst. (2012)
Keyphrases
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prediction accuracy
low cost
privacy preserving
high speed
resource sharing
prediction algorithm
data sharing
high density
daily life
knowledge sharing
single chip
learning object repositories
vlsi implementation
analog vlsi
prediction error
software reuse
physical design
multithreading
functional verification