Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining.

Lizheng Zhang Yuhen Hu Charlie Chung-Ping Chen

Published in: DAC (2004)

Keyphrases

high speed
power dissipation
analog vlsi
circuit design
low power
chip design
power consumption
low cost
cmos technology
printed circuit boards
evolvable hardware
data driven
global information
statistical models
physical design
real time
analog circuits
nm technology