Login / Signup
A fractional-N digital PLL with background-dither-noise-cancellation loop achieving <-62.5dBc worst-case near-carrier fractional spurs in 65nm CMOS.
Cheng-Ru Ho
Mike Shuo-Wei Chen
Published in:
ISSCC (2018)
Keyphrases
</>
noise cancellation
worst case
input output
metal oxide semiconductor
power consumption
low power
image quality
adaptive filter
objective function