A Novel High-Speed Flip-Flop Circuit Using RTDs and HEMTs.

Hideaki Matsuzaki Toshihiro Itoh Masafumi Yamamoto

Published in: Great Lakes Symposium on VLSI (1999)

Keyphrases

high speed
flip flops
low power
power dissipation
cmos technology
multiple input
real time
shift register
high speed networks
master slave
neural network
power consumption
machine vision
frame rate