Synthesis of partition-codec architecture for low power and small area circuit design.
Shanq-Jang RuanJen-Chiun LinPo-Hung ChenKun-Lin TsaiFeipei LaiPublished in: ISCAS (5) (2001)
Keyphrases
- low power
- circuit design
- vlsi architecture
- low cost
- high speed
- power consumption
- cmos technology
- mixed signal
- nm technology
- gate array
- high power
- single chip
- digital circuits
- real time
- design automation
- wireless transmission
- vlsi circuits
- digital signal processing
- video coding
- signal processor
- power dissipation
- ultra low power