Design and implementation of high performance dynamic 64-bit parallel adder with enhanced testability.
Wei HwangGeorge Diedrich GristedePia N. SandaShao Y. WangDavid F. HeidelPublished in: CICC (1998)
Keyphrases
- bit parallel
- pattern matching
- efficient implementation
- design process
- circuit design
- implementation issues
- architectural design
- design methodology
- design decisions
- engineering design
- dynamic environments
- information systems
- current status
- rapid prototyping
- dynamic adaptation
- regular expressions
- design principles
- platform independent
- design methodologies
- modular design
- high level synthesis
- user interface