13.4 A 7ns-access-time 25μW/MHz 128kb SRAM for low-power fast wake-up MCU in 65nm CMOS with 27fA/b retention current.
Toshikazu FukudaKoji KoharaToshiaki DozakaYasuhisa TakeyamaTsuyoshi MidorikawaKenji HashimotoIchiro WakiyamaShinji MiyanoTakehiko HojoPublished in: ISSCC (2014)
Keyphrases
- low power
- cmos technology
- low voltage
- power consumption
- nm technology
- high speed
- low power consumption
- low cost
- single chip
- wireless transmission
- digital signal processing
- image sensor
- vlsi circuits
- random access memory
- mixed signal
- high power
- power reduction
- parallel processing
- delay insensitive
- vlsi architecture
- logic circuits
- power dissipation
- access control
- silicon on insulator
- power management
- energy efficiency
- power saving
- random access
- leakage current
- image processing