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Iterated Timing Analysis with Dynamic Partitioning Technique for Bipolar Transistor Circuits.
Masaki Ishida
Koichi Hayashi
Masakatsu Nishigaki
Hideki Asai
Published in:
ISCAS (1994)
Keyphrases
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high speed
low power
high density
circuit design
data mining
positive and negative
real time
databases
neural network
image processing
image segmentation
data structure
low cost
power consumption
power dissipation
logic circuits