Optimal power and noise allocation for analog and digital sections of a low power radio receiver.
Kannan Aryaperumal SankaragomathiManodipan SahooSatyam DwivediBharadwaj S. AmruturNavakanta BhatPublished in: ISLPED (2008)
Keyphrases
- low power
- mixed signal
- power consumption
- high power
- vlsi circuits
- low cost
- energy dissipation
- high speed
- vlsi architecture
- wide dynamic range
- single chip
- multi channel
- power saving
- power reduction
- wireless transmission
- digital signal processing
- cmos image sensor
- power dissipation
- logic circuits
- optimal allocation
- cmos technology
- low power consumption
- digital circuits
- physical layer
- real time
- cognitive radio
- wireless communication
- signal processing
- signal processor
- gate array
- ultra low power