A 12-bit hybrid DAC with 8GS/s unrolled pipeline delta-sigma modulator achieving >75dB SFDR over 500MHz in 65nm CMOS.
Shiyu SuTu-I TsaiPraveen Kumar SharmaMike Shuo-Wei ChenPublished in: VLSIC (2014)
Keyphrases
- delta sigma
- analog to digital converter
- cmos technology
- mixed signal
- low power
- nm technology
- image sensor
- power consumption
- high speed
- cmos image sensor
- low voltage
- delta sigma modulators
- noise shaping
- parallel processing
- low cost
- imaging systems
- image coding
- high frequency
- silicon on insulator
- feature extraction
- image processing