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Cache-processor coupling: a fast and wide on-chip data cache design.
Masato Motomura
Toshiaki Inoue
Hachiro Yamada
Akihiko Konagaya
Published in:
IEEE J. Solid State Circuits (1995)
Keyphrases
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memory access
data sets
memory subsystem
data analysis
single chip
query processing
computer systems
memory management
cache misses
database
data access
low cost
high speed
parallel processing
computer architecture
multithreading
read write
memory bandwidth
processor core