Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links.

Mike Bichan Anthony Chan Carusone

Published in: ISCAS (2007)

Keyphrases

high speed
low cost
high density
single chip
level parallelism
analog vlsi
circuit design
multithreading
programmable logic
physical design
vlsi implementation
vlsi design
gigabit ethernet
functional verification
chip design
random access memory
evolvable hardware