Double-via insertion enhanced X-architecture clock routing for reliability.

Chia-Chun Tsai Chung-Chieh Kuo Lin-Jeng Gu Trong-Yen Lee

Published in: ISCAS (2010)

Keyphrases

packet switching
real time
power consumption
high speed
network reliability
management system
shortest path
routing protocol
information systems
ad hoc networks
highly reliable
routing decisions
software architecture
routing algorithm
low power
data flow
social networks