The opportunity cost of low power design: a case study in circuit tuning.
Matthew M. ZieglerVictor V. ZyubanGeorge GristedeMilena VratonjicJoshua FriedrichPublished in: ISLPED (2009)
Keyphrases
- low power
- logic circuits
- high speed
- gate array
- power dissipation
- cmos technology
- power consumption
- single chip
- power reduction
- vlsi architecture
- low cost
- digital signal processing
- low power consumption
- mixed signal
- vlsi circuits
- opportunity cost
- circuit design
- design process
- real time
- nm technology
- graphical models
- signal processing