A high speed low power CMOS clock driver using charge recycling technique.
Ilias BourasYiannis LiaperdosAngela ArapoyanniPublished in: ISCAS (2000)
Keyphrases
- low power
- high speed
- charge coupled device
- single chip
- cmos technology
- power consumption
- digital signal processing
- image sensor
- wireless transmission
- high power
- mixed signal
- vlsi circuits
- ultra low power
- frame rate
- logic circuits
- real time
- low power consumption
- vlsi architecture
- power dissipation
- gate array
- cmos image sensor
- signal processor
- low cost