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Design of a Programmable Delay Line with On-Chip Calibration to Achieve Immunity Against Process Variations.
Kanika Monga
Eesha Karnawat
Nitin Chaturvedi
S. Gurunarayanan
Published in:
VDAT (2022)
Keyphrases
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single chip
design process
low cost
high speed
engineering design
circuit design
case study
evolvable hardware
camera calibration
physical design
programmable logic
computer vision
design methodology
metamodel
design principles
conceptual model
process model
evolutionary algorithm