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A New Assist Technique to Enhance the Read and Write Margins of Low Voltage SRAM Cell.
Santhosh Keshavarapu
Saumya Jain
Manisha Pattanaik
Published in:
ISED (2012)
Keyphrases
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low voltage
random access memory
power line
read write
design considerations
leakage current
power management
cmos technology
power consumption
write operations