Login / Signup
Design Optimization, Fabrication And Testing Of A Capacitive Silicon Accelerometer Using An Soi Approach.
K. N. Bhat
B. R. K. Reddy
V. Vinoth Kumar
K. Siva Kumar
Y. Sushma
N. Ramesh Babu
K. Natarajan
Published in:
Int. J. Comput. Eng. Sci. (2003)
Keyphrases
</>
silicon on insulator
high density
high speed
cmos technology
semiconductor devices
plasma etching
neural network
information systems
ibm power processor
data sets
learning algorithm
integrated circuit