Verification of networked Labs-on-Chip architectures.

Andreas Grimmer Werner Haselmayr Andreas Springer Robert Wille

Published in: DATE (2017)

Keyphrases

functional verification
high speed
low cost
model checking
high density
single chip
analog vlsi
formal verification
vlsi implementation
evolvable hardware
verification method
digital signal processors
social networks
programmable logic
vlsi design
fingerprint verification
circuit design
input output