A Memory-Based IPv6 Lookup Architecture Using Parallel Index Generation Units.
Hiroki NakaharaTsutomu SasaoMunehiro MatsuuraHisashi IwamotoYasuhiro TeraoPublished in: IEICE Trans. Inf. Syst. (2015)
Keyphrases
- processing units
- ip address
- master slave
- parallel programming
- parallel processing
- multi processor
- distributed processing
- database query processing
- shared memory
- multi core processors
- database
- processor array
- management system
- parallel computing
- address space
- parallel computation
- level parallelism
- distributed memory
- campus network
- single instruction multiple data
- processing elements
- parallel architecture
- parallel implementation
- network architecture
- indexing techniques
- network traffic
- software architecture
- intrusion detection
- multi dimensional
- real time