Login / Signup
An intermediate hardware model with load/store unit for C to FPGA.
Akira Yamawaki
Masahiko Iwane
Published in:
FPGA (2009)
Keyphrases
</>
real time
low cost
experimental data
computational model
mathematical model
high level
probabilistic model
theoretical framework
similarity measure
prior knowledge
hidden markov models
statistical model
load balancing
hardware and software