Architecture of a One-Chip Data Driven Processor: Q-p.
Hiroaki NishikawaHiroaki TeradaKohji KomatsuShin-ichi YoshidaToshiya OkamotoYoshiko TsujiSaki TakakuraTsuyoshi TokuraYoichiro NishikawwaShuji HaraMitsuo MeichiPublished in: ICPP (1987)
Keyphrases
- data driven
- high speed
- level parallelism
- multithreading
- single chip
- memory subsystem
- instruction set
- parallel architecture
- memory access
- analog vlsi
- ibm zenterprise
- low cost
- chip design
- management system
- floating point arithmetic
- processor core
- cmos image sensor
- real time
- industry standard
- vlsi implementation
- parallel processing
- ibm power processor
- processing elements
- systolic array
- host computer
- functional units
- multi core processors
- functional verification
- hardware implementation
- hardware architecture
- random access memory
- multi processor
- computation intensive
- floating point
- design considerations
- low power
- embedded systems
- single instruction multiple data
- central processor
- cmos technology