Formal Verification of Fault-Tolerant Hardware Designs.
Luis EntrenaAntonio J. Sanchez-ClementeLuis Ángel García-AstudilloMarta Portela-GarcíaMario García-ValderasAlmudena LindosoRoberto SarmientoPublished in: IEEE Access (2023)
Keyphrases
- formal verification
- fault tolerant
- hardware designs
- fault tolerance
- model checking
- model based diagnosis
- distributed systems
- model checker
- bounded model checking
- load balancing
- symbolic model checking
- automated verification
- temporal logic
- high availability
- safety critical
- state machine
- formal methods
- hardware description language