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Regularity-Aware Routability-Driven Macro Placement Methodology for Mixed-Size Circuits With Obstacles.

Jai-Ming LinYou-Lun DengSzu-Ting LiBo-Heng YuLi-Yen ChangTe-Wei Peng
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2019)
Keyphrases
  • data driven
  • real world
  • high speed
  • window size
  • chip design
  • case study
  • artificial neural networks
  • small size