Building blocks for a 100 MS/s, 10-b, 1.8 V CMOS cascaded folding & interpolating A/D converter.
Christos KokozidisStamatis BourasAngela ArapoyanniPublished in: ICECS (2003)
Keyphrases
- building blocks
- low voltage
- analog to digital converter
- protein folding
- single phase
- power supply
- power consumption
- high speed
- data conversion
- low power
- control method
- pac man
- high voltage
- circuit design
- face detection
- analog vlsi
- low cost
- cmos technology
- design considerations
- interpolation method
- basis functions
- back end
- vlsi circuits
- multiple sclerosis
- wind turbine
- database
- delay insensitive
- random access memory
- power electronics
- neural network