Hardware-efficient EVD processor architecture in FastICA for epileptic seizure detection.
Yi-Hsin ShihTsan-Jieh ChenChia-Hsiang YangHerming ChiuehPublished in: APSIPA (2012)
Keyphrases
- real time
- instruction set
- parallel architectures
- parallel architecture
- low cost
- error detection
- epileptic seizures
- hardware architecture
- ibm zenterprise
- neural network
- image processing
- industry standard
- hardware design
- hardware and software
- computer systems
- processing elements
- memory management
- processing units
- computer architecture
- multi core processors
- feature selection
- xilinx virtex
- computation intensive