Hardware Reduction for Lut-Based Mealy FSMs.
Alexander BarkalovLarysa TitarenkoKamil MielcarekPublished in: Int. J. Appl. Math. Comput. Sci. (2018)
Keyphrases
- low cost
- hardware and software
- finite state machines
- computer systems
- real time
- parallel hardware
- embedded systems
- hardware implementation
- hardware architecture
- reduction method
- computing power
- massively parallel
- parallel architectures
- lookup table
- data sets
- computing systems
- personal computer
- computational power
- parallel processing
- input output
- high speed
- genetic algorithm
- vlsi implementation