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A physical unclonable function chip exploiting load transistors' variation in SRAM bitcells.
Shunsuke Okumura
Shusuke Yoshimoto
Hiroshi Kawaguchi
Masahiko Yoshimoto
Published in:
ASP-DAC (2013)
Keyphrases
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cmos technology
power consumption
high density
low power
circuit design
low voltage
cf contextpath
random access memory
low cost
high speed
real time
power reduction
analog vlsi
single chip
evolutionary algorithm
physical design
data transmission
integrated circuit