A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique.
Hyung Seok KimCarlos OrnelasKailash ChandrashekarDan ShiPin-en SuPaolo MadoglioYee William LiAshoke RaviPublished in: IEEE J. Solid State Circuits (2013)