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A combined anti-aliasing filter and 2-tap FFE in 65-nm CMOS for 2× blind 2-;10 Gb/s ADC-based receivers.
Tina Tahmoureszadeh
Siamak Sarvari
Ali Sheikholeslami
Hirotaka Tamura
Yasumoto Tomita
Masaya Kibune
Published in:
CICC (2010)
Keyphrases
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anti aliasing
high speed
multi channel
cmos technology
low cost
wireless communication
analog vlsi
computer generated images
analog to digital converter
silicon on insulator
image processing
three dimensional
signal processing
virtual world
power supply
single chip