Design of a Quaternary Single-Ended Current-Mode Circuit for an Energy-Efficient Inter-chip Asynchronous Communication Link.
Akira MochizukiHirokatsu ShirahamaTakahiro HanyuPublished in: ISMVL (2014)
Keyphrases
- circuit design
- chip design
- evolvable hardware
- high speed
- micron cmos
- physical design
- single chip
- analog vlsi
- design methodology
- low cost
- future development
- ad hoc networks
- case study
- parallel processing
- power dissipation
- cmos technology
- vlsi implementation
- energy consumption
- logic circuits
- design process
- high level synthesis
- user interface