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Concurrent Error Detection/Correction in the HAL MMU Chip.
David Chih-Wei Chang
Nirmal R. Saxena
Published in:
FTCS (1993)
Keyphrases
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error detection
error correction
error recovery
data cleansing
high speed
fault isolation
fault tolerance
low cost
error correcting
error resilient
analog vlsi
vlsi implementation
response time
high density
error control
programmable logic
single chip
physical design
neural network