Adaptive error correction in Orthogonal Latin Square Codes for low-power, resilient on-chip interconnection network.
Seung Eun LeePublished in: Microelectron. Reliab. (2013)
Keyphrases
- error correction
- low power
- high speed
- low cost
- single chip
- mixed signal
- power consumption
- low power consumption
- low density parity check
- cmos technology
- interconnection networks
- error detection
- power dissipation
- nm technology
- data hiding
- ldpc codes
- error correcting
- ultra low power
- channel coding
- reed solomon
- vlsi architecture
- multistage
- watermarking scheme
- real time
- block codes
- high density
- multi channel