A token scan architecture for low power testing.
Tsung-Chu HuangKuen-Jong LeePublished in: ITC (2001)
Keyphrases
- low power
- vlsi architecture
- low cost
- power consumption
- high speed
- cmos technology
- mixed signal
- nm technology
- high power
- single chip
- vlsi circuits
- digital signal processing
- logic circuits
- low power consumption
- real time
- hardware and software
- power dissipation
- image sensor
- signal processor
- power reduction
- wireless transmission
- gate array