A CMOS chaotic Boltzmann machine circuit and three-neuron network operation.

Masatoshi Yamaguchi Hakaru Tamukoh Hideyuki Suzuki Takashi Morie

Published in: IJCNN (2017)

Keyphrases

boltzmann machine
high speed
circuit design
analog vlsi
delay insensitive
generative model
boltzmann machines
feed forward
learning algorithm
support vector
power consumption