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VLSI architecture design for a fast parallel label assignment in binary image.

Shyue-Wen YangMing-Hwa SheuHsien-Huang P. WuHung-En ChienPing-Kuo WengYing-Yih Wu
Published in: ISCAS (3) (2005)
Keyphrases
  • binary images
  • vlsi architecture
  • vlsi implementation
  • connected components
  • gray scale
  • real time
  • low power
  • low complexity
  • gray level images
  • component labeling
  • feature extraction
  • multiresolution
  • image features