Cost-efficient hardware implementation of stereo image depth optimization system.
Chun-Chang YuChia-Hao ChengPei-Chun LinCharlie Chung-Ping ChenPublished in: IC3D (2014)
Keyphrases
- hardware implementation
- cost efficient
- stereo images
- fpga implementation
- efficient implementation
- signal processing
- software implementation
- hardware design
- dedicated hardware
- image pairs
- hardware architecture
- field programmable gate array
- pipeline architecture
- governmental organizations
- depth information
- stereo vision
- stereo matching
- disparity estimation
- stereo pair
- depth map
- fpga device
- image rectification
- three dimensional
- neural network