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A Reconfigurable Architecture for Binary Acceleration of Loops with Memory Accesses.
Nuno Miguel Cardanha Paulino
João Canas Ferreira
João M. P. Cardoso
Published in:
ACM Trans. Reconfigurable Technol. Syst. (2015)
Keyphrases
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reconfigurable architecture
systolic array
memory usage
access patterns
database
non binary
memory requirements
image processing
memory access
neural network
website
multi agent systems
higher order
main memory
computing power
memory space
memory size
low memory
data sets