Area minimization algorithm for parallel prefix adders under bitwise delay constraints.
Taeko MatsunagaYusuke MatsunagaPublished in: ACM Great Lakes Symposium on VLSI (2007)
Keyphrases
- parallel implementation
- objective function
- constrained optimization
- multiple constraints
- optimization algorithm
- k means
- cost function
- dynamic programming
- expectation maximization
- learning algorithm
- computational cost
- segmentation algorithm
- linear programming
- simulated annealing
- significant improvement
- preprocessing
- tree structure
- recognition algorithm
- hardware implementation
- critical path
- particle swarm optimization
- global minimization
- bit parallel
- regularization term
- search algorithm
- similarity measure
- clustering algorithm