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A Low-Power Post-LPDDR4 Interface Using AC Termination at RX and an Active Inductor at TX.
Jeongsik Yoo
Yeonho Lee
Yoonjae Choi
Hyunsu Park
Sanghune Park
Chulwoo Kim
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2018)
Keyphrases
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low power
power consumption
high speed
low cost
single chip
low power consumption
vlsi architecture
logic circuits
high power
digital signal processing
wireless transmission
vlsi circuits
gate array
ultra low power
real time
image sensor
mixed signal