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A 9b 165MS/s 1.8V pipelined ADC with all digital transistors amplifier.
Mezyad M. Amourah
Haydar Bilhan
Feng Ying
Lieyi Fang
Gonggui Xu
Ramesh Chandrasekarad
Randall L. Geiger
Published in:
CICC (2003)
Keyphrases
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circuit design
high power
low power
data flow
power consumption
high density
sigma delta
wide dynamic range
analog to digital converter
neural network
image processing
digital media
dynamic range
power supply