A 40nm RRAM Compute-in-Memory Macro Featuring On-Chip Write-Verify and Offset-Cancelling ADC References.
Wantong LiXiaoyu SunHongwu JiangShanshi HuangShimeng YuPublished in: ESSDERC (2021)
Keyphrases
- analog to digital converter
- chip design
- cmos technology
- power dissipation
- dynamic random access memory
- low cost
- nm technology
- high speed
- single chip
- random access memory
- memory access
- memory subsystem
- power consumption
- memory requirements
- memory usage
- read write
- computational power
- sigma delta
- metal oxide semiconductor
- parallel processing
- digital signal processors
- embedded dram
- level parallelism
- memory space
- silicon on insulator
- physical design