Simultaneous Compensation of RC Mismatch and Clock Skew in Time-Interleaved S/H Circuits.

Zheng Liu Masanori Furuta Shoji Kawahito

Published in: IEICE Trans. Electron. (2006)

Keyphrases

high speed
power consumption
delay insensitive
power dissipation
information retrieval
digital circuits
website
video sequences
multi agent
distributed systems
multiscale
parallel processing
rate control
circuit design
feature selection
analog circuits
asynchronous circuits
logic circuits
power reduction
data sets