Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores.
Li ChenXiaoliang BaiSujit DeyPublished in: DAC (2001)
Keyphrases
- processor core
- dynamic random access memory
- high speed
- level parallelism
- operating system
- ibm power processor
- single chip
- memory subsystem
- ibm zenterprise
- embedded processors
- low cost
- multi core processors
- low power
- embedded systems
- parallel architectures
- functional verification
- software development life cycle
- input output
- clock frequency
- multithreading
- physical design
- parallel processing
- multi core systems
- embedded dram