Low power design and dynamic power management system for VLIW DSP subsystem.
Hsien-Ching HsiehShui-An WenChe-Yu LiaoHuang-Lun LinPo-Han HuangShing-Wu TungPublished in: ISPACS (2011)
Keyphrases
- low power
- power consumption
- digital signal processing
- low power consumption
- management system
- power dissipation
- high speed
- low cost
- single chip
- high power
- ultra low power
- power reduction
- vlsi architecture
- logic circuits
- cmos technology
- mixed signal
- signal processing
- power saving
- vlsi circuits
- gate array
- energy efficiency
- energy dissipation
- nm technology
- data flow
- power management
- delay insensitive
- cmos image sensor
- computer vision and image processing