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A Fine-Grained Clock Buffer Polarity Assignment for High-Speed and Low-Power Digital Systems.
Deokjin Joo
Taewhan Kim
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
Keyphrases
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high speed
low power
fine grained
power consumption
coarse grained
mixed signal
low cost
single chip
high power
vlsi circuits
frame rate
massively parallel
low power consumption
real time
digital signal processing
logic circuits
vlsi architecture
wireless transmission
access control
embedded systems
text classification
power reduction