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A high-speed dynamic instruction scheduling scheme for superscalar processors.

Masahiro GoshimaKengo NishinoToshiaki KitamuraYasuhiko NakashimaShinji TomitaShin-ichiro Mori
Published in: MICRO (2001)
Keyphrases
  • high speed
  • dynamic environments
  • low power
  • bayesian networks
  • search algorithm
  • real time
  • graphical models