Low-power single-phase clocked redundant-transition-free flip-flop design with conditional charging scheme.
Ling ChenYanan SunWeifeng HePublished in: ASICON (2017)
Keyphrases
- low power
- power dissipation
- power consumption
- single chip
- cmos technology
- low power consumption
- flip flops
- high speed
- low cost
- vlsi architecture
- logic circuits
- digital signal processing
- single phase
- gate array
- mixed signal
- power reduction
- nm technology
- real time
- ultra low power
- embedded systems
- signal to noise ratio
- image processing
- control method
- active power filter
- input output
- design process