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An Equivalence Verification Methodology for Asynchronous Sleep Convention Logic Circuits.

Mousam HossainAshiq A. SakibSudarshan K. SrinivasanScott C. Smith
Published in: ISCAS (2019)
Keyphrases
  • logic circuits
  • low power
  • asynchronous circuits
  • model checking
  • logic synthesis
  • functional decomposition
  • case study
  • tunnel diode
  • gate array
  • high speed
  • input output
  • power consumption
  • ad hoc networks